Manufacturing of integrated circuits is generally a procedure of forming thin films and layers of various materials on wafers of base semiconductor material, and selectively removing areas of such films to provide structures and circuitry. Doped silicon is a typical base wafer material. Chemical vapor deposition is a well known process for depositing such thin films and layers. For example, silicon may be deposited from silane gas, SiH.sub.4. It is known, too, to deposit tungsten silicide from a mixture of gases including silane and a tungsten-bearing gas such as tungsten hexaflouride. Pure tungsten is also deposited on silicon wafers in the manufacture of integrated circuits.
In a typical chemical vapor deposition process wafers are placed on supports within a sealable chamber, the chamber is scaled and evacuated, the wafers are heated, typically by heating the wafer support, and a gas mixture bearing the desired material to be coated is introduced into the chamber. The temperature of the wafer material at the surface to be coated causes the desired coating material to form on the surface from the gas mixture. It is important to control the temperature, the concentration of various gases in the mixture introduced, and such characteristics as the uniformity of flow of gas over the surface being coated.
In most cases, active structures and circuitry are formed on one side of a wafer, and the other side is not so used. The side not so used is called the backside of the wafer. In lithography procedures for defining patterns on deposited layers to aid in the proper selective removal of such deposited layers to form structures and circuitry, the backside of a wafer is typically used as a registering surface. For this and other reasons it is important that the backside of a wafer be kept smooth and clean, and that, in general, material not be deposited on the backside.
Another important characteristic in layering techniques is that the deposited layers be adherent to the base wafer material or to the next underlying layer, so layered material doesn't flake or peel. The dimensions of structures and circuitry in integrated circuit technology are very small, so any unwanted flaking or peeling may easily spoil structures or circuitry. Moreover, flakes from a non-adherent layer of material can spoil other structures and circuitry on the same or other wafers, and also may damage sensitive equipment and require cleaning procedures beyond those that might otherwise be necessary.
To promote adhesion, it is common to deposit a layer of material known as an adhesion layer, or glue layer, in a very thin film, before depositing the required thicker layer of material. The adhesion layer in some cases is an entirely different material known to be adherent to the base material and to the new layer to be applied. Titanium is often deposited by sputtering as an adhesion layer before depositing tungsten or a tungsten rich material, such as tungsten silicide, by a chemical vapor deposition.
Sputtering is generally a line-of-sight process, in which material is emitted in substantially atomic form from a source toward a substrate, and a film of the sputtered material forms on all surfaces in line-of-sight of the source. Very little material forms on surfaces not in line-of-sight. This line-of-sight characteristic is often a disadvantage when depositing a layer of material as a process step in integrated circuit manufacture, because uneven topography of existing structures and circuitry on a wafer often causes uneven thickness of the developing sputtered layer. Chemical vapor deposition processes, on the other hand, do not have this deficiency. It has been found through trial, however, that in some cases, an initial thin sputtered layer of a material will promote adhesion of a subsequently deposited layer by chemical vapor deposition. As an example of such a procedure, it is common to sputter a thin film of titanium or other adhesion layer on a wafer prior to deposition of a blanket tungsten or a tungsten silicide layer.
FIG. 1A is a side view of a wafer 11 resting at an angle against a surface 13 within a chamber used for chemical vapor deposition. Surface 13 supports the wafer and is heated to transfer heat to wafer 11 so that when CVD gases are introduced to the chamber, material will deposit on the wafer. FIG. 1B is a front view of wafer 11 on surface 13, and shows the wafer resting on two pins 15 and 17, which is common in many CVD machines. Support at a small angle, or nearly vertical, as shown in FIG. 1A, is mostly for convenience in handling wafers. The orientation of a wafer in a CVD chamber is generally not critical to characteristics of the deposition process.
FIG. 2 is a partial section through an edge of wafer 11 and a part of heating and support surface 13 along line 2--2 of FIG. 1B. A sputtered adhesion layer 19 is shown by FIG. 2 overlaying the base wafer material 21. The adhesion layer was applied with the surface to be coated facing sputtering sources. Because of the above-described line-of-sight nature of the sputtering process, adhesion layer 19 has a relatively uniform thickness "t" over the surface of the wafer facing away from the heating and support surface 13. The thickness of the adhesion layer, however, diminishes rapidly around the edge of the wafer, and ends at point 23, which is about the midpoint of the edge of the wafer. Beyond point 23 toward surface 13, and on the backside of the wafer, there is no adhesion layer at all. This is true around the circumference of the wafer.
When a wafer with an adhesion layer applied from one side, having a thickness profile substantially as shown in FIG. 2, is placed in a CVD machine, and a CVD layer 25 is applied, the thickness profile will be substantially as shown in FIG. 2 for layer 25. The thickness of the CVD layer will be substantially uniform across the surface opposite the support and heating surface, and will extend all the way around the edge of the wafer. This even coating characteristic is because CVD is a process in which material precipitates from a gas at the surface to be coated. There is no line-of-sight phenomenon. Also, because wafers are not typically perfectly flat, there will be areas around the periphery of the wafer where the backside is not in contact with the support and heating surface. In these areas where the backside of the wafer is not flat against the heating and support surface, such as surface 27 in FIG. 2, there will be some CVD coating.
The uniformity-of-coating characteristic difference between the sputtering process, used to deposit adhesion layer 19 and the CVD process, used to deposit CVD layer 25, causes a significant problem. Because the CVD material coats beyond point 23, where the adhesion layer ends, and also on the backside of the wafer in some areas, represented by surface 27 in FIG. 2, some of the CVD material is not adherent, and will peel. The flakes from peeling are a particulate problem in process, causing such as shorts between circuit patterns, and a cleaning requirement. The flakes can also damage some sensitive processing equipment. Because the flaking is typically uneven, rather than complete and uniform, registration for lithographic procedures becomes more difficult.
One way sputtered adhesion layers are used and peeling avoided is by sputtering the adhesion layer on the backside of the wafer as well as on the frontside; and by altering the orientation of the wafer during sputtering, so the edges of the wafer are coated with the adhesion layer as well. If this is done, then the subsequent CVD layer will deposit on an underlying adhesion layer in all areas, and peeling is avoided.
A significant problem with the all-over sputtering solution is that the equipment to manipulate a wafer to coat the edges is more expensive and complicated to use than equipment to coat one side. Also the backside coating requirement substantially doubles the process cost of the step of applying the adhesion layer.
Another way that has been tried is to avoid backside coating in the CVD process is to press the wafer against the support and heating surface from the frontside. Accordingly, equipment has been built to press on a wafer at multiple points around the periphery of the wafer, near the outside diameter, in the CVD process. This point-clamping technique, however, has two significant drawbacks. Unless the wafer is backside and edge sputtered for the adhesion layer, there is still no adhesion layer over part of the wafer edge. Also, the multiple point technique does not completely elminate backside CVD coating. Wafers, like any other material, when heated substantially from one side, tend to warp and curl, and the forces are large. There are still areas that are exposed to some degree on the backside, and the potential for damage to fragile wafers is increased. The point pressure technique is relatively effective when the adhesion layer is sputtered on the edges and backside, but the disadvantages of the extra sputtering operations still has to be absorbed.
What is clearly needed is CVD apparatus and method that effectively and economically restricts CVD deposition to the frontside only of a wafer, so that expensive edge and backside sputtering of adhesion layers need not be done.